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february 2012 doc id 018746 rev 2 1/1 1 stm32f051x4 stm32f051x6 stm32f051x8 low- and medium-density advanc ed arm?-based 32-bit mcu with 16 to 64 kbytes flash, timers , adc, dac and comm. interfaces features operating conditions: ? voltage range: 2.0 v to 3.6 v arm 32-bit cortex?-m0 cpu (48 mhz max) memories ? 16 to 64 kbytes of flash memory ? 8 kbytes of sram with hw parity checking crc calculation unit clock management ? 4 to 32 mhz crystal oscillator ? 32 khz oscillator for rtc with calibration ? internal 8 mhz rc with x6 pll option ? internal 40 khz rc oscillator calendar rtc with alarm and periodic wakeup from stop/standby reset and supply management ? power-on/power down reset (por/pdr) ? programmable voltage detector (pvd) low power sleep, stop, and standby modes v bat supply for rtc and backup registers 5-channel dma controller 1 12-bit, 1.0 s adc (up to 16 channels) ? conversion range: 0 to 3.6v ? separate analog supply from 2.4 up to 3.6 two fast low-power analog comparators with programmable input and output one 12-bit d/a converter up to 55 fast i/os ? all mappable on external interrupt vectors ? up to 36 i/os with 5 v tolerant capability up to 18 capacitive sensing channels supporting touchkey, li near and rotary touch sensors 96-bit unique id serial wire debug (swd) up to 11 timers ? one 16-bit 7-channel advanced-control timer for 6 channels pwm output, with deadtime generation and emergency stop ? one 32-bit and one 16-bit timer, with up to 4 ic/oc, usable for ir control decoding ? one 16-bit timer, with 2 ic/oc, 1 ocn, deadtime generation and emergency stop ? two 16-bit timers, each with ic/oc and ocn, deadtime generation, emergency stop and modulator gate for ir control ? one 16-bit timer with 1 ic/oc ? independent and system watchdog timers ? systick timer: 24-bit downcounter ? one 16-bit basic timer to drive the dac communication interfaces ? up to two i 2 c interfaces; one supporting fast mode plus (1 mbit/s) with 20 ma current sink, smbus/pmbus, and wakeup from stop ? up to two usarts supporting master synchronous spi and modem control; one with iso7816 interface, lin, irda capability, auto baud rate detection and wakeup feature ? up to two spis (18 mbit/s) with 4 to 16 programmable bit frame, 1 with i 2 s interface multiplexed ? hdmi cec interface, wakeup on header reception table 1. device summary reference part number stm32f051x4 stm32f051k4, stm32f051c4, stm32f051r4 stm32f051x6 stm32f051k6, stm32f051c6, stm32f051r6 stm32f051x8 stm32f051c8, stm32f051r8, stm32f051k8 lqfp64 10x10 lqfp48 7x7 ufqfpn32 5x5 www.st.com
contents stm32f051x 2/3 doc id 018746 rev 2 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.1 arm? cortextm-m0 core with embedded flash and sram . . . . . . . . . 10 3.2 memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.3 cyclic redundancy check calculation unit (crc) . . . . . . . . . . . . . . . . . . . 10 3.4 direct memory access controller (dma) . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.5 nested vectored interrupt controller (nvic) . . . . . . . . . . . . . . . . . . . . . . . 11 3.6 extended interrupt/event controller (exti) . . . . . . . . . . . . . . . . . . . . . . . . 11 3.7 clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.8 boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.9 power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.9.1 power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.9.2 power supply supervisors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.9.3 voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.10 low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.11 real-time clock (rtc) and backup registers . . . . . . . . . . . . . . . . . . . . . . 14 3.12 timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.12.1 advanced-control timer (tim1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.12.2 general-purpose timers (tim2..3, tim14..17) . . . . . . . . . . . . . . . . . . . . 16 3.12.3 basic timer tim6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.12.4 independent window watchdog (iwwdg) . . . . . . . . . . . . . . . . . . . . . . . 17 3.12.5 system window watchdog (wwdg) . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.12.6 systick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.13 inter-integrated circuit interfaces (i 2 c) . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.14 universal synchronous/asynchronous receiver transmitters (usart) . . . 18 3.15 serial peripheral interface (spi)/inter-integrated sound interfaces (i 2 s) . 19 3.16 high-definition multimedia interface (hdmi) - consumer electronics control (cec) 20 3.17 general-purpose inputs/outputs (gpios) . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.18 touch sensing controller (tsc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 stm32f051x contents doc id 018746 rev 2 3/3 3.19 analog to digital converter (adc) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.19.1 temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.19.2 v bat battery voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3.20 digital-to-analog converter (dac) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.21 fast low power comparators and reference voltage . . . . . . . . . . . . . . . . . 22 3.21.1 serial wire debug port (sw-dp) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4 pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5 memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6 package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 6.1 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 7 ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 list of tables stm32f051x 4/4 doc id 018746 rev 2 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. stm32f051xx family device features and peripheral counts . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 4. comparison of i2c analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 5. stm32f051xx i 2 c implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 6. stm32f051xx usart implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 7. stm32f051x spi/i2s implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 8. capacitive sensing gpios available on stm32f051x devices . . . . . . . . . . . . . . . . . . . . . 20 table 9. no. of capacitive sensing channels available on stm32f051xx devices. . . . . . . . . . . . . . 21 table 10. legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 11. pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 12. alternate functions selected through gpioa_afr registers for port a . . . . . . . . . . . . . . . 29 table 13. alternate functions selected through gpiob_afr registers for port b . . . . . . . . . . . . . . . 30 table 14. stm32f051x peripheral register boundary addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table 15. lqfp64 ? 10 x 10 mm 64 pin low-profile quad flat package mechanical data . . . . . . . . . . 35 table 16. lqfp48 ? 7 x 7mm, 48-pin low-profile quad flat package mechanical data. . . . . . . . . . . . 36 table 17. ufqfpn32 - 32-lead ultra thin fine pitch quad flat no-lead package (5 x 5), package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 table 18. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 stm32f051x list of figures doc id 018746 rev 2 5/5 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 2. clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 3. lqfp64 64-pin package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 4. lqfp48 48-pin package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 5. ufqfpn32 32-pin package pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 6. stm32f051x memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 7. lqfp64 ? 10 x 10 mm 64 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . 35 figure 8. recommended footprint (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 figure 9. lqfp48 ? 7 x 7mm, 48-pin low-profile quad flat package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 figure 10. recommended footprint (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 figure 11. ufqfpn32 - 32-lead ultra thin fine pitch quad flat no-lead package outline (5 x 5). . . . . . 37 figure 12. ufqfpn32 recommended footprint (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 description stm32f051x 6/9 doc id 018746 rev 2 1 description the stm32f051xx family incorporates the high-performance arm cortex?-m0 32-bit risc core operating at a 48 mhz frequency, high-speed embedded memories (flash memory up to 64 kbytes and sram up to 8 kbytes), and an extensive range of enhanced peripherals and i/os. all devices offer standard communication interfaces (up to two i 2 cs, two spis, one i2s, one hdmi cec, and up to two usarts), one 12-bit adc, one 12-bit dac, up to five general-purpose 16-bit timers, a 32-bit timer and an advanced-control pwm timer. the stm32f051xx family operates in the -40 to +85 c and -40 to +105 c temperature ranges, from a 2.0 to 3.6 v power supply. a comprehensive set of power-saving modes allows the design of low-power applications. the stm32f051xx family includes devices in th ree different packages ranging from 32 pins to 64 pins. depending on the device chosen, di fferent sets of peripherals are included. the description below provides an overview of the complete range of peripherals proposed in this family. these features make the stm32f051xx microcontroller family suitable for a wide range of applications such as application control and user interfaces, handheld equipment, a/v receivers and digital tv, pc peripherals, gaming and gps platforms, industrial applications, plcs, inverters, printers, scanners, alarm systems, video intercoms, and hvacs. stm32f051x description doc id 018746 rev 2 7/9 table 2. stm32f051xx family device features and peripheral counts peripheral stm32f051kx stm32f051cx stm32f051rx flash (kbytes) 16 32 64 16 32 64 16 32 64 sram (kbytes) 484848 timers advanced control 1 (16-bit) general purpose 5 (16-bit) 1 (32-bit) basic 1 (16-bit) comm. interfaces spi (i2s) (1) 1(1) (2) 2(1) 1(1) (2) 2(1) 1(1) (2) 2(1) i 2 c1 (3) 21 (3) 21 (3) 2 usart 1 (4) 21 (4) 21 (4) 2 cec 1 12-bit synchronized adc (number of channels) 1 (10 ext. + 3 int.) 1 (16 ext. + 3 int.) gpios 273955 capacitive sensing channels 14 17 18 12-bit dac (number of channels) 1 (1) analog comparator 2 max. cpu frequency 48 mhz operating voltage 2.0 to 3.6 v operating temperature ambient operating temperature: -40 c to 85 c / -40 c to 105 c junction temperature: -40 c to 125 c packages ufqfpn32 lqfp48 lqfp64 1. the spi1 interface can be used either in spi mode or in i2s audio mode. 2. spi2 is not present 3. i2c2 is not present 4. usart2 is not present device overview stm32f051x 8/9 doc id 018746 rev 2 2 device overview figure 1. block diagram 0 ! ; = % 8 4 ) 4 . 6 ) # b i t ! $ # ! $ i n p u t s 3 7 # , + 3 7 $ ! 4 . 2 3 4 6 $ $ t o 6 6 ! & ! ( " 3 2 ! - 7 + 5 0 6 3 3 3 # , 3 $ ! ) # 6 $ $ ! ' 0 $ - ! c h a n n e l s 8 4 ! , / 3 # - ( z 8 4 ! , k ( z / 3 # ) . 0 & |